ISU Electrical and Computer Engineering Archives

System-level design refinement using SystemC

Walstrom, Robert D. (2005) System-level design refinement using SystemC. Masters thesis, Iowa State University.

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Abstract

Embedded systems have become increasingly complex with the advent of the system-on-a-chip (SOC) era. Today a typical SOC may consist of one or more processor cores, dedicated hardware processing units, peripheral devices, on-chip memories, and the logic for a sophisticated communications network to link all of these components together. In order to deal with the complexity of designing a SOC, designers needed new design languages and tools. System-level design languages (SLDLs) and EDA tools allow designers to manage this complexity by using different levels of abstraction to define and model the system. Several SLDLs have been introduced in recent years, most notably SpecC developed at the University of California, Irvine and SystemC developed by the Open SystemC Initiative (OSCI). In some aspects, these SLDLs share the same goals. Both support the ability to model a system at various levels of abstraction and the reuse of intellectual property. However, while SystemC claims the most industry support with a wide variety of supported tools available from major EDA vendors, it lacks a well-defined refinement methodology like that of SpecC. The SpecC refinement methodology leads designers from its highest level of abstraction down to its lowest level of abstraction. While each level of abstraction in SystemC is clearly defined, it is not clear what changes need to be made to convert a design from one level of abstraction to another. In order to facilitate a system-level design approach, SystemC needs well-defined methodology for bringing a model defined at the highest level of abstraction down to the lowest level of abstraction. This thesis presents a top-down refinement methodology for systems modeled in SystemC. Since SystemC has gained widespread industry support, such a methodology would make it easier for designers who use SystemC to refine their design and use the SystemC language as intended by a system-level design approach.

EPrint Type:Thesis (Masters)
Uncontrolled Keywords:System-level design SystemC SpecC Embedded Systems
Subjects:Computer Engineering > COMPUTER SYSTEMS ARCHITECTURE > Embedded Systems
ID Code:182
Identification Number:TR-2005-07-19
Deposited By:Robert D. Walstrom
Deposited On:21 July 2005

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