The design and development of nanocrystalline silicon thin film transistors
McDonald, Jarrod (2004) The design and development of nanocrystalline silicon thin film transistors. Masters thesis, Iowa State University.
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This work reports on the fabrication of thin film transistor devices at low temperatures using hydrogenated-nanocrystalline silicon (nc-Si:H). Nanocrystalline silicon is a new electronic material, which is capable of being deposited at low temperatures on any substrate, and thus offers the possibility of making large area devices on flexible substrates. This work presents a design and process for fabricating 25 µm length n-channel, top gate, thin film transistors. The TFTs were fabricated using hydrogenated-nanocrystalline silicon (nc-Si:H), deposited by plasma enhanced chemical vapor deposition (PECVD) over a thermally oxidized silicon wafer. The deposition was done at a temperature of 300 ºC. Metal layers were deposited by thermal evaporation and etching steps were done via dry etching in a reactive ion etching system and by wet etching. Silicon nitride, deposited by PECVD at 300 °C, was used as the dielectric material in the TFT. MIS capacitors were made to judge the quality of the silicon nitride/nc-Si:H interface, and interface defect densities were measured using capacitance-voltage techniques. It was found that an interface defect density of approximately 4.55x1011 cm-1eV-1 was achievable with hydrogen passivation. MIM capacitors were made to determine the dielectric breakdown of the material. The silicon nitride layer broke down at an electric field of 4 MV/cm. The transistors tested have shown a threshold voltage (VTH) ≈ 13.3 V, a channel surface mobility (µ) ≈ 0.2 cm2/[V·sec] and an on-off ratio of ≈103.
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